A PCB contains a major electronic circuit or network that will contain different kind of components, and voltages and currents flowing throughout its vias. For instance, a switch-mode power supply is a circuit or component that reduces voltage or changes power output with the used of constant modulated signals. In fact, the use of periodic signals produces noise, which may cause issues into other nearby nets and damaging the overall circuit behavior. Therefore, it is important to understand how PCB signal integrity works and should be performed appropriately to have a PCB working without noise/signal issue flows and comply to industrial or end device expected standards (e.g., EMI compliance)
PCB signal integrity, also abbreviated as SI, is a concept that englobes the overall signal behavior and analysis present on a specific network or circuit on a PCB and how it works and may affect the entire PCB circuit behavior. PCB signal integrity analysis considers losses and interference by simulation and testing over a PCB for both power and communication interfaces, being the first a series of simulation and analysis performed PRIOR to the PCB sampling phase, more on these topics further.
A PCB signal integrity test and analysis must be an essential step to proceed before the fabrication of any complex PCB. A complex PCB is that which will use many or several noise/losses duet to the use of specific switching components or several losses. But more importantly, the PCB signal integrity is most important on high-speed signals and differential pair traces on any high speed PCB. There are a couple of phenomena that presents on high-speed signals as discussed below.
There are many discussions, rules of thumb per se and rules and guidelines provided by component manufacturers in order to preserve PCB signal integrity and provide protection against unwanted behavior.
Definitely, it is of high importance to follow up the design suggestions and considerations from a specific component manufacturer, which mainly involve trace widths, forms (e.g., avoiding 90° bending or traces), via sizes, lengths (e.g., delay propagation) and spacing (e.g., crosstalk, differential pairs), among other PCB build-up and stack considerations, which are highly related to impedance matching.
Impedance matching is an important concept in PCB signal integrity, as it will balance the noise with the build-up considerations for a specific PCB in harmony with proper clocking source routing and power integrity with the voltage supplying networks/components.
The fundamental part of PCB signal integrity must consider power integrity. As for signal integrity, this must ensure some of the rules mentioned above, which in fact will provide a good guideline for a high-speed signal design. Nevertheless, a badly design power network will also affect the behavior of the PCB.
Power integrity must ensure that a power delivery network (PDN) has considered the appropriate PCB build/stack and avoided the generation of crosstalk of ground bouncing around the signals. It also considers the suppression of electromagnetic interference (EMI) with proper network/plane shielding and the proper analysis to prevent the generation of signal return paths.
Depending on signals and traces, the behavior of a specific PCB will differ depending on its working conditions. Therefore, proper PCB signal integrity analysis will consider simulation. In a simulation, specific software tools will analyze the flow of the electricity through each component attending to a preprogrammed circuit model, commonly an IBIS file (more on this later).
Simulation results help us prevent unwanted behaviors and will provide suggestions for component relocation and rerouting shall it be needed. Also, PCB sample testing of signals will provide realistic behavior of a target PCB depending on the environmental conditions and will help solve issues presented if a PCB re-spin is required.
There are different ways to measure and test PCB signal integrity. The first is run on a local lab/facility with the aid of proper signal tracing tools. For instance, signal integrity must abide to a specific protocol to transmit/receive specific information through the bit information.
Hence, the test of the number of lost bits/comms is an index for detecting errors on the hardware design. The most common method is called Bit Error Rate Testing (BERT), which includes the use of signal analyzers or oscilloscope to detect if error is presented specifically on hardware or an end node.
On the other hand, EMI/EMC compliance testing centers may help on the overall testing of noise produced from the designed artifact and will detect noise spots on specific parts of the circuit/wiring that might be suppressed with the use of ferrites or might required the re-spin of a board on most critical cases.
As stated above, PCB signal integrity depends on a set of design rules of thumb and considerations, being impedance matching one of the most relevant considerations for the proper build/stack-up of a given board. Therefore, the proper calculation of impedance matching with a stack-up is a significant relief for proper signal integrity on multilayer boards. Although complex, the use of many PCB design tools (e.g., Saturn PCB Design Toolkit) will require to input specific PCB and impedance values for it to provide suggested via and traces widths and rules to work with.
PCB signal integrity simulation utilizes very specialized software to emulate the flow of electricity through a certain circuit network and will provide a predicted behavior based on the component preprogrammed simulation files. I/O buffer Info Specification (IBIS) files help providing standardized information about specific target components that help in the signal simulation outputs.
As for EMI/EMC compliance, there are also other set of files that help other software simulation tools with the board shape, known as ODB++ files due to the mechanical understanding of the board, there is software capable of adapting them and produce complete 3D EMI signal/intensity maps).